Codasip RISC-V sale fuels speculation GlobalFoundries could be expanding its processor ambitions

Codasip RISC-V sale fuels speculation GlobalFoundries could be expanding its processor ambitions ...
Semiconductor Engineering

Increasing Design Flexibility With RISC-V-Based Processor IP

The semiconductor industry increasingly needs more flexible and scalable processor architectures, driving the growing adoption of RISC-V. Originally developed at the University of California, Berkeley ...
Business Wire

StarFive’s RISC-V Based JH-7110 Intelligent Vision Processing Platform Adopted VeriSilicon’s Display Processor IP

SHANGHAI--(BUSINESS WIRE)--VeriSilicon (688521.SH) today announced the successful integration of its Display Processor IP DC8200 into StarFive’s JH-7110 RISC-V mass production SoC. With high ...
Verdict on MSN

SiFive raises $400m to expand RISC‑V data centre and AI roadmap

The company plans to use the capital to expand global engineering teams and speed its roadmap for agentic AI data centre ...
The Next Web

SiFive raises $400m Series G at $3.65bn valuation in final round before IPO

SiFive, the RISC-V chip IP firm, raised $400m in an oversubscribed Series G led by Atreides and backed by Nvidia, valuing it ...
Nasdaq

ECARX Holdings Inc. Introduces EXP01 Processor at RISC-V Summit Europe 2025, Advancing Intelligent Mobility Solutions

ECARX launched its RISC-V-based EXP01 processor and outlined its automotive-grade MCU roadmap at the RISC-V Summit Europe 2025. ECARX Holdings Inc., a global mobility tech provider, introduced its ...
SpaceNews

SwRI Is Researching ARM, RISC-V Processors For Use As Faster Spaceflight Computers

Researchers point to a microprocessor on a space-ready motherboard used in spaceflight applications. SwRI is evaluating reduced instruction set computers (RISC-V or “risk five”) and Advanced RISC ...
The American Bazaar

Nvidia-backed startup SiFive raises $400 million in funding

SiFive said on Thursday it has raised a $400 million round of funding from Atreides Management, Nvidia and others ...
Business Wire

LDRA Launches Multicore and Worst-Case Execution Time (WCET) Support for RISC-V-based Processors

WIRRAL, England--(BUSINESS WIRE)--LDRA today announced that the LDRA tool suite now supports the hardware-based, multicore mitigation capabilities of RISC-V processors such as Microchip, Synopsys and ...
Seeking Alpha

ECARX Debuts EXP01 Processor at RISC-V Summit Europe 2025, Outlines Next-Generation MCU Roadmap and Global RISC-V Strategy

SHANGHAI, May 16, 2025 (GLOBE NEWSWIRE) -- ECARX Holdings Inc. (ECX) (“ECARX” or the “Company”), a global mobility tech provider, announced the debut of its EXP01 processor built on the RISC-V ...
EDN

ARM926EJ-S Processor with Jazelle RISC CPU

The ARM926EJ-S™ processor features a Jazelle® technology enhanced 32-bit RISC CPU, flexible size instruction and data caches, tightly coupled memory (TCM) interfaces and memory management unit (MMU).
EDN

FPGA prototyping harnessed for RISC-V processor cores

FPGA-based prototyping solutions provider S2C has teamed up with RISC-V processor IP supplier Andes Technology to enhance prototyping capabilities for system-on-chip (SoC) designs. This collaboration ...